APEG Group: Teaching Resources

Dear Students, Engineers, Researchers and Hobbyists,

Welcome to the website of the Applied Electronics Group (APEG), Faculty of Electrical Engineering, University of Montenegro. APEG Group (Applied Electronics Group) was founded in 2004 at Faculty of Electrical Engineering, University of Montenegro. It deals with electronics applied anytime everywhere. In addition to teaching content of the different courses, the site can be interesting for everyone dealing with HW and SW, including many aspects.

I hope you will find something interesting for you on our site.

Yours,
Prof. dr Radovan Stojanovic, APEG establisher and responsible professor for courses

<Courses> <Research><Submission> <Other>

Courses

  1. Medical Electronics (MEDEL)
  2. Automated Design of Electronic Circuits and Systems (APEKS) and Simulation of Electronic Circuits (SEK)
  3. Industrial Electronics (INDEL)
  4. Real Time Control (RTC)
  5. Hardware-Software Design (HW-SW-DES)
  6. Biomedicinka mjerenja i instrumentacija (BMMI)
  7. VHDL and VHDL Programming
  8. C Programing Language
  9. Applications of GIS Technologies in Maritime (GIS-MA)
  10. Modeling and Simulation in Electronics (MSE)
  11. Technological Entrepreneurship (TeEn)
  12. Precision Agriculture (PA)
  13. IoT Ecosystems (IoT-ECO)

MEDEL (Medical Electronics – Medicinska elektronika)

Staff and term:
Prof. dr Radovan Stojanovic (professor),
Dr Dejan Karadaglic (assistant)
Studies: BSc, Semester: 6
Lessons:
ECTS catalogue
Lessons 2025
Evaluation criteria (out of 100): Presence=5, Lab1=10, Lab2=10, Lab3=10, MidTerm (Col)=20, FinalWriten=15, FinalOral=30;
Labs and Exercises:
Lab #1: 10 points (5 group work, 5 induvidual answers)
Assigment
Design and simulation of real ECG amplifier in LT Spice
Associated files: ECG.asc, ECG1.asc, ECG signal in file, Basic ECG circuit
Associated dir: Here you can file many files or docs of interest
Example of written work to submit
Lab #2: 10 points (5 group work, 5 induvidual answers)
Design of PPG (Photoplethysmography) and RR (Respiration Ratio) amplifiers and signal processing
Assigment:
Example of work to submit
Associated files: exercise2.ino, ex1.m, MyFFT.m, serialplot.exe
Lab #3: 10 points (5 in grups with induvidual answers part A, 5 induvidual answers part B)
ECG instrument, recording amplitude and time parameters of your ECG
Assigment:
Directorium with material needed
MidTerm Exam:
Written work: 20 points
Preparation material for MidTermExam
Associated dir: Here you can file many files or docs of interest
Example of the work to submit
Final Exam:
Written work: 15 points
Oral exam: 30 points
Material for final exam
Progress:
Students, regular 2025
Students, cond 2025
Literature:
Links of interest:

APEKS and SEK
(Automatised Design of Electronic Circuits and Systems and Simulation of Electronic Circuits):

Staff and term:
Prof. dr Radovan Stojanovic (professor), Dr Dejan Karadaglic (assistant)
Studies: Spec, MSc, Semester: 1
Lessons:
Part I: VHDL and FPGA Design (Pressentations for students)
AUTOMATIZOVANO PROJEKTOVANJE DIGITALNIH SISTEMA (VHDL i FPGA), Radovan Stojanovic, Textbook, Tempus, 2008, Book in Serbian
Part II: Lesson 1 (The tools for simulation of analog circuits)
Additional material:
9_1_Quartus_free,  Tool for development, Editor, Compiler, Simulator, Programmer, former Altera, now Intel
Evaluation criteria (out of 100):
presence: 5; activity: 10, lab.1-mini seminar: 30 (15 in group 15 in person), lab 2-mini seminar:30(15 in group, 15 in person), final: 25 (in person)
in person: problem solving
Exercises and Lab:
Simulacione vjezbe: Vjezbe #1-#7 u okvuru predavanja Part I: VHDL and FPGA Design
Laboratorija, priprema:  Vjezbe1-3, Vjezbe4-7
Additional material:
User Manual
DE2-70 Pins Asigments
Getting Started with Altera’s DE2-70 Board, Tutorial
CD-ROM-DE2-70
CD-rom/de2/ (terasic.com) 
Simple example how to asign pins on DE2-70 board
UART Coomunication on DE1, cores, IP cores academic programme, example 1, example 2, SOPC Builder
LAB1_MATERIAL (The colection of the programmes in Quartus 9.1)
Seminar works (practical projects):
Actual
Previous Link… Traffic_light_controller_on_FPGA_DE2-70_board , Two_Digit_Seven_Segment_Counter, Up_counter_with_7_segment_display, Frequency_counter_design, 2_digit_7_segment_counter, Step_Stair_Light_Timer_with_FPGA, LED_intensity_control_using_PWM, Blink_circuit_with_3_to_8_Decoder, Ring_Johnson_counter, Real_car_alarm_2, Real_car_alarm, Stair_Steps_Light_timer, Simple_calculator_on_FPGA_DE2-70 board, Simple_keyboard_with_four_keys, Deboucing_on_FPGA, RANDOM_NUMBER_GENERATOR_FPGA, Generator_function_on_FPGA, Multi_chanels_PWM_controler_on_FPGA, Lotto_Generator_FPGA, Real car-dor alarm Wwth Panic button,
FPGA DESIGN OF STOPWATCH (ResearchGate), DC Motor Control Using FPGA Generated PWM (ResearchGate), MATLAB to VHDL Converter Examples (ResearchGate), IIR filter design in FPGA -Simple example (ResearchGate)
Progress and knowledge check:
Progress, regular 2024
Progress_cond 2024
Literature:
K.L. Short, VHDL for Engineers
Pong P. Chu, FPGA Prototyping by VHDL Examples: Xilinx Spartan™-3 Version, July 2007, DOI: 10.1002/9780470231630,  ISBN: 9780470185315
Ian Grout, Digital Systems Design with FPGAs and CPLDs, 
EEC 180B – Digital Systems II, University of California, Davis, https://www.ece.ucdavis.edu/~soheil/teaching/EEC180B-S06/labs.html 
Other material:
On_Line Tool (za vjezbanje)
Download Software Page Intel Quartus, 
Download 91_quartus_free
University Program (Terasic)
University Program (Terasic)
https://www.newark.com/pdfs/techarticles/microchip/3_3vto5vAnalogTipsnTricksBrchr.pdf
Links:

INDEL (Industrial Electronics – Industrijska elektronika)

Staff and term:
Prof. dr Radovan Stojanovic (professor), Dr Dejan Karadaglic (assistant)
Studies: Spec, MSc, Semester: 2
Lessons:
ECTS katalog
Uvod (o predmetu)
RTC komplementarne lekcije
Resursi PLC
Evaluation criteria (out of 100): (Presence and activity=10(5+5), Lab1=10, Lab2=10, Seminar 1=20, Seminar2=20, Oral exam=30)
Pressentations: and materials:
Part I:
1. Ulazni elementi (senzori, pretvarači i transmiteri) (Ch10)
2. Izlazni elementi (pojačavači, ventili, releji, promenljivo-frekvencijski drajveri, step motori, servomotori) (Ch11, Ch11a, Ch11b)
3. Industrijski izvori napajanja(invertori, konvertori) (Ch7)
4. Kontrola indusrijskih motora (Ch15, Ch15a, Ch15b, Ch15c)
Part II:
5. Programabilni kontroleri (Ch3, Lit.10-Lit.15)
6. Industrijska komunikacija (Ch, Lit.3-Lit.7)
7. SCADA (Lit.8)
8. IND4.0 IoT
Labs and Exercises:
Lab #1 (10 poena, 5 u grupi, 5 induvidualno): Input, CPU, Output. Pooling, Interrupts. Open and close loop control. LAB A-B, Raditi LAB A, 1,2,3,4,5,6,7,9; LAB-B, 1,2,3,4,7,10
Procitati: Predavanja i Vjezbe 1-6 iz RTC komplementarne lekcije. Primjeri radova na ovu temu se mogu naci na Dodatni materijal za LAB_AB
Izvjestaj za realizovanju laboratorije: Potrebno je napraviti izvestaj sa realizovane laboratorije prema datom Primjeru izvjestaja
Lab #2 (10 poena, 5 u grupi, 5 induvidualno): PLC example of stair steps automata
Assigments and work, Staircase lighting automata using Siemens LOGO!
Additional literature:
Model of pump station for water supply with reserved pumps using Siemens LOGO!
Francisco Glover, LOGO! for PLC (original link)
LOGO! 24RC,LOGIC MODULE,DISPLAY
Resursi PLC (PLC Logo! resources, software + examples)
Seminar works:
Seminar #1 (20, 10 u grupi, 10 induvidualno)
Seminar #2: (20, 10 u grupi, 10 induvidualno)
Progress and knowledge check:
Students, regular 2025
Students, cond 2025
Literature:
1. T. E. Kissell, Industrial Electronics, Third edition, Prentice Hall, 2003
2. S. A. Karr, T. E. Kissell, R. C. Overstreet. T.W. Wylie, Laboratory Manual to accompany Industrial Electronics, Third edition, Prentice Hall, 2003
3. S. Djiev, Industrial Networks for Communication and Control.
4. Milo Janković, CAN BUS PROTOKOL SERIJSKE KOMUNIKACIJE, Specijalistički rad, 2017
5. Damjan Mustur, Ivan Rašović, Milo Janković, Marko Biljurić, RS485 mreža, Seminarski Rad
6. Filip Perović, Nikola Jovović, RS485 COMMUNICATION BETWEEN MICROCONTROLLERS, Seminarski rad, 2024
7. Komunikacija u industrijskim sistemima
8. Vasilije Vujadinovic, Ivona Vranic, Rašid Kolic, Luka Manojlovic, Jovana Petrovic, Miloš Lazarevic, Introduction to Zenon Software (SCADA)
10. Uros Jankovic, Ivan Dusevic, Balša Kruščić, Božidar Ašanin, Tomislav Markićević, Jovana Bovan, Radovan Stojanovic, Staircase lighting automata using Siemens LOGO!, Technical Report, 2023.
11. Rada Musić, Jovan Ćorović, Nebojsa Skerovic, Petar Milic, Radovan Stojanovic, Model of pump station for water supply with reserved pumps using Siemens LOGO!, Techical report 2024
12. Programirljivi logicki kontroler, FERI Zagreb, Autorizovane prezentacije
13. Miloš Bubanja, Vojin Đurović, Đorđe Vukčević, Yuriy Onišuk, PLC , seminarski rad
14. Temperaturni kontroler pomoću PLC-a, vjezba
15. PLC, studentska vjezba
16. Vladimir Ćetković, Anka Bojović, Elmir Bučan, Mikonja Mrkić, Radovan Stojanovic Model of Pump Control with LabVIEW and USB-6009, 2024
17. Lazar Ašanin, Ivan Adžić, Ognjen Bulatović, Miloš Bojić, Semir Kardović and Pavle Saveljić and Radovan Stojanović,  Smart Energy Meter with Arduino, Technical Report, 2023
Links:

  • RTC (Real Time Control):

NEWS:

Staff and term:
Prof. dr Radovan Stojanovic (professor), Dr Dejan Karadaglic (deputy), Summer semester

Lessons:
ECTS catalogue
Lessons 2024
Resursi PLC

Workflow of the classes and exams:

Progress and knowledge check:
Checking methodology: prisustvo 5, aktivnost 10, LAB 1: 10 poena, LAB 2: 10 poena, Seminarski : 35, Zavrsni (usmeni) 30
Progress_MS_2024

Other (additional material etc..)

Labs and Exercises:
Lab #1: Input, CPU, Output. Pooling, Interrupts. Open and close loop control. (10 poena): LAB A-B
Procitati: Predavanja i Vjezbe 1-6 iz Lessons 2024. Primjeri radova na ovu temu se mogu naci na Dodatni materijal za LAB_AB
Izvjestaj za realizovanju laboratorije: Potrebno je napraviti izvestaj sa realizovane laboratorije prema datom Primjeru izvjestaja
Lab #2: LAB-C, LAB-D (RTOS and Energy Meter), 10 points, Work in 3 groups. Each of groups is obligated to perform Vjezba #1 or Vjezba #2 from LAB-C and Vjezba #1 from LAB-D

  • Dodatni materijal za LAB_AB
  • Ocitavanje temperature i sile na udaljenom Arduinu, The measurement of temperature and force using Arduino and Serial Terminal 
  • Hardverski interapti – Arduino, primjeri Hardware Interrupts on Arduino, examples
  • Ocitavanje temperature i sile, timer interrupt Sampling the temperature and the force by using timer interrupt
  • On-Off Regulator Temperature , On-Off Temperature Regualtor
  • Automatska regulacija svijetla, On-Off Light regulator
  • PWM Regulator of DC motor
  • Koristenje Terminal Emulatora za zadavanje komandi
  • Interrupt tutorial
  • Example of timer and serial event interrupt (Arduino code) (ne radi)
  • Konvertor industrijski (multi choice)
  • Temperature measurement by thermocouple and Arduino
  • Dynamo meter by Arduino   
  • Conductivity by Arduino 
  • Temperature measurement by Arduino

Seminarski 2024:
Grupa 1: Experimental SCADA system FREE SCADA + 1-2 panel control of simple system as example temperature controler.
Grupa 2: Experimental SCADA system FREE SCADA + 1-2 panel control of simple system as example ligh or level or entrance controler.
Potrebno je instalirati besplatnu SCADU za edukaciju. Naci je na Internetu. Povezati je sa PCL om koji ima prosti ulaz (senzor temperature ili neke druge velicine) i prosti izlaz on-off rele. Ulaz sa senzora se dovodi na PLC iz kojeg se vrsi upravljanje relea. PLC je povezan na SCADA Panel. Npr. Projektujemo panel za kontrolu temperature, koji prikazuje trenutnu i zadatu temperaturu i pri tom komunicira sa PLC za prikupljanje podataka, startovanje i stopiranje programa. PLC vrsi regulaciju temperature i komunikaciju sa panelom. Vidi sliku.

Primjer seminarskih

  • Lazar Ašanin, Ivan Adžić, Ognjen Bulatović, Miloš Bojić, Semir Kardović and Pavle Saveljić and Radovan Stojanović,  Smart Energy Meter with Arduino, Technical Report, 2023

Literature:

Links:
Assistan’s space (teaching and other material from assistant)

  • HW-SW-DES (Hardware – Software Design):

NEWS:

Staff and term:
Prof. dr Radovan Stojanovic (professor), Dr Dejan Karadaglic (deputy), Summer semester

Lessons:
Introduction

Labs and Exercises:
I group: Smart parking (diy loop sensor, diy 555 based metal detector, link)
II grupa: (Kethosis Detection)
III grupa: (diy capacitive sensor)
IV Grupa (JavaScript Applet za L calaculation, link)

Workflow of the classes and exams:

Progress and knowledge check:

Other (additional material etc..):

Literature:

Links:
Assistan’s space (teaching and other material from assistant)

  • BMMI (Biomedical Measurements and Instrumentation):

NEWS:

Staff and term:
Prof. dr Radovan Stojanovic (professor), Dr Dejan Karadaglic (deputy), Summer semester

Lessons:
Introduction and tasks

Labs and Exercises:

Workflow of the classes and exams:

Progress and knowledge check:
September term 2024 results

Other (additional material etc..):

Literature:

Links:
Assistan’s space (teaching and other material from assistant)

  • VHDL language and VHDL Programming

NEWS:

Staff:
Prof. dr Radovan Stojanovic (profesor), Dr Dejan Karadaglic (asistent). Ljetnji semestar

  • Workflow of the classes and exams:
  • D1 Prisustvo (5) 
  • D2 Kolokvijum I (35) 
  • Pismeni (25). Asistent. Zadaci iz pripremnog materijala , dio A i dio B, zadatak iz dijela A nosi 40% od 25, dok zadatak iz dijela B nosi 60% od 25 (SPR Dio A (1-27), dio B (1-20)). Broj zadatka iz oba dijela se random odredjuje iz testnog materijala (koji je slican pripremnom, ali u pojedinim zadacima, brojne vrijednosti ili neki uslovi mogu biti promijenjeni) prije starta kolokvijuma. Zadaci se predaju preko forme za predaju. Trajanje kolovijuma je 60min.
  • D2.1 Pripremni materijal, pismeni (25)
  • Broj zadatka iz oba dijela se random odredjuje, prije starta kolokvijuma. Zadaci se predaju preko forme za predaju. Trajanje kolovijuma je 60min.
  • Pripremni materijal (SPR Dio A (1-27), dio B (1-20))
  • Primjer predaje kolokvijuma 
  • Primjer dobre izrade, sa rjesenjem
  • Primjer gresaka
  • Upustvo nastavnika (video), Upustvo za pokretanje programa i izradu primjera
  • Testni materijal  (primjer, dostupan neposredno prije kolokvijuma)
  • Raspored zadataka (primjer, dostupan neposredno prije kolokvijuma)
  • Predati faj pod nazivom APEKS_SEK_2022_Kol1_Jovana_Cipranic.pdf
  • Trajanje 90 min.   
  • Link za predaju Kolokvija 8. April 2024.
  • Zadaci za 8. April 2024
  • Rezultati kolokvijuma od 8. Aprila 2024.
  • D2.2 Pripremni materijal, usmeni (10). Nastavnik.
  • Jedno (1) pitanje, kviz, (5 poena) iz testnog materijala, Primpremni materijal C 2023 , jedno (1) pitanje (5 poena) iz gradiva. Testni materijal na ispitu je izmijenjen u pogledu sprecavanja copy-paste (5 bodova). Jedno pitanje od strane nastavnika iz materijala za predavanje (5 poena), oznaceno sa “C1” u predavanjima.  
  • D3 Laboratorija (20). Asistent
  • Rad u grupama na prakticnim vjezbama, Exercises1-4,  Exercises4-6, (10 poena). Provjera od strane asistenta (10 poena) 
  • Primjer predaje Laboratorije koja se predaje preko sistema sa imenom fajla kakav je dat, obratiti paznju na video koji mora pratiti prezentaciju, na kraju opisa je dat link na video… Primjer opisa vjezbe
  • D4 Zavrsni (40)
  • D4.1 Pripremni materijal, pismeni (10). Asistent
  • 1 zadatak (10 poena) iz dijela A + B pripremnog materijala, koji se nalazi ovdje (Materijal je apdejtovan 16. januara 2024 – Dejan Karadaglić).
  • Ispitni materijal (jan. 2024)
  • Raspored zadataka (jan. 2024)
  • Link za predaju (jan. 2024)
  • D4.2 Pripremni materijal, usmeni (30). Nastavnik.
  • 1 kviz pitanje(10 poena) iz dijela C, pripremnog materijala . 2 pitanje ili problema profesora iz gradiva (2×10) poena, iz materijala za predavanje

Progress and knowledge check:
Progress of the students 2024

Other (additional material etc..):
Dodatni materijal (ranije generacije, laboratorija i ostali radovi)

  • Implementation of VHDL-FPGA Circuits in DE-70 Board (The files with the bellow titles Link…)
  • Traffic_light_controller_on_FPGA_DE2-70_board 
  • Two_Digit_Seven_Segment_Counter 
  • Up_counter_with_7_segment_display
  • Frequency_counter_design
  • 2_digit_7_segment_counter
  • Seven_segment_counter_ 0 – 99
  • Step_Stair_Light_Timer_with_FPGA
  • LED_intensity_control_using_PWM
  • Blink_circuit_with_3_to_8_Decoder
  • Ring_Johnson_counter
  • Real_car_alarm_2
  • Real_car_alarm
  • Stair_Steps_Light_timer
  • Simple_calculator_on_FPGA_DE2-70 board
  • Simple_keyboard_with_four_keys
  • Deboucing_on_FPGA
  • RANDOM_NUMBER_GENERATOR_FPGA
  • Generator_function_on_FPGA
  • Multi_chanels_PWM_controler_on_FPGA
  • Lotto_Generator_FPGA
  • FPGA DESIGN OF STOPWATCH (template, Researchgate)
  • DC Motor Control Using FPGA Generated PWM (template, Researchgate)
  • MATLAB to VHDL Converter Examples (template, Researchagate)
  • IIR filter design in FPGA -Simple example (template, Researchgate)
  • FPGA Prototyping by VHDL Examples: Xilinx Spartan™-3 Version, July 2007, DOI: 10.1002/9780470231630,  ISBN: 9780470185315

Literature:

Links:
Assistan’s space (teaching and other material from assistant)

Archive from the old site

Research

Submissions

>>Submit (submit your work or work of your team (exams, seminars….etc…)
>> Submit already passed exam (for students that passed exam conditionally)

Admin:
Nastava disk space
Submission of the work
Submission of passed exams

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